Introduction of new materials and new transistor structures in advanced technology nodes will further increase the ever-rising complexity of circuit design flow and design rules. The rocketing R&D expense and wafer-cost, on the other hand, will limit the number of active fab players. The aim of this Short Course is to present circuit designers aspects of advanced technology nodes that one must be aware of in designing circuits in a hierarchical way. Special focus will be put on design flow integration and total design flow management.

New non-volatile memories and 3D integration technologies are rapidly getting wide attention, as means to realize high-speed, low-power, and/or low-cost electronic systems without relying solely upon CMOS scaling. The aim of this Workshop is to make attendees feel the potential of the two technologies that will change architectures of near future LSI-based systems. Talk topics will be selected so that they represent newest advancements, as well as system level applications, of the technologies.